Host computers often operate with one or more mass storage devices, such as a hard disk drive or magnetic tape drive, over some sort of communication link. In addition, data is often transferred between a host computer and a mass storage device over a communication link on a per-block basis. For purposes of this application, the data contained in a block is referred to herein as "block data".
Today's communication links, such as the Small Computer System Interface (SCSI), support high data transfer rates. In order to make use of these high data transfer rates, both host computers and mass storage devices typically include one or more buffer memory devices (buffer memory). The buffer memory is used to receive and temporarily store incoming block data at the high data transfer rate supported by the particular communication link being used. After the block data is received, it may then be read from the buffer memory and processed. An example of a mass storage device making use of a buffer memory for this purpose can be found in U.S. Pat. No. 4,843,544, entitled Method and Apparatus for Controlling Data Transfers through Multiple Buffers. That patent is incorporated herein by reference.
During the transfer of block data into the buffer memory of a receiving device (i.e., either a host computer or mass storage device), the boundary of where one block ends and another begins must remain known in order to preserve the block data format information. This can be a complicated task as the length of each block can vary and a block boundary can reside anywhere in the buffer memory. Prior art systems for accomplishing this task include a microprocessor and a software routine, or a relatively complex state machine. These prior art systems can result in significant system overhead thereby reducing the performance level of a receiving device, or alternatively require the need for high cost control circuitry to achieve the desired performance level.